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    LICS
    2006
    IEEE
    84views Automated Reasoning» more  LICS 2006»
    Temporal Logics and Model Checking for Fairly Correct Systems
    16 years 16 days ago
    Temporal Logics and Model Checking for Fairly Correct Systems
    Download  www.doc.ic.ac.uk
    We motivate and study a generic relaxation of correctness of reactive and concurrent systems with respect to a temporal specification. We define a system to be fairly correct if...
    Daniele Varacca, Hagen Völzer
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    APSEC
    2005
    IEEE
    95views Software Engineering» more  APSEC 2005»
    A Lightweight Integration of Theorem Proving and Model Checking for System Verification
    16 years 4 days ago
    A Lightweight Integration of Theorem Proving and Model Checking for System Verification
    Download  www.jaist.ac.jp
    Weiqiang Kong, Takahiro Seino, Kokichi Futatsugi, ...
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    DATE
    2005
    IEEE
    98views Hardware» more  DATE 2005»
    Space-Efficient Bounded Model Checking
    16 years 4 days ago
    Space-Efficient Bounded Model Checking
    Download  www.cs.tau.ac.il
    Jacob Katz, Ziyad Hanna, Nachum Dershowitz
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    ICCAD
    2005
    IEEE
    140views Hardware» more  ICCAD 2005»
    Embedded tutorial: formal equivalence checking between system-level models and RTL
    16 years 4 days ago
    Embedded tutorial: formal equivalence checking between system-level models and RTL
    Download  www2.iccad.com
    Alfred Koelbl, Yuan Lu, Anmol Mathur
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    LICS
    2005
    IEEE
    124views Automated Reasoning» more  LICS 2005»
    Model-Checking Hierarchical Structures
    16 years 3 days ago
    Model-Checking Hierarchical Structures
    Download  www.informatik.uni-leipzig.de
    Hierarchical graph definitions allow a modular description of graphs using modules for the specification of repeated substructures. Beside this modularity, hierarchical graph de...
    Markus Lohrey
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