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ICCAD
1996
IEEE
121views Hardware» more  ICCAD 1996»
15 years 10 months ago
Identification of unsettable flip-flops for partial scan and faster ATPG
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs
CEC
2009
IEEE
15 years 11 months ago
Parallel global optimisation meta-heuristics using an asynchronous island-model
Abstract— We propose an asynchronous island-model algorithm distribution framework and test the popular Differential Evolution algorithm performance when a few processors are ava...
Dario Izzo, Marek Rucinski, Christos Ampatzis
ICASSP
2011
IEEE
14 years 10 months ago
Robust changepoint detection based on multivariate rank statistics
We introduce a novel statistical test for unsupervised detection of changepoints in multidimensional sequences of temporal observations. The test statistic is based on a multivari...
Alexandre Lung-Yut-Fong, Céline Lévy...
FM
2006
Springer
133views Formal Methods» more  FM 2006»
15 years 10 months ago
Enforcer - Efficient Failure Injection
Non-determinism of the thread schedule is a well-known problem in concurrent programming. However, other sources of non-determinism exist which cannot be controlled by an applicati...
Cyrille Artho, Armin Biere, Shinichi Honiden
ITC
2000
IEEE
84views Hardware» more  ITC 2000»
15 years 10 months ago
Non-intrusive BIST for systems-on-a-chip
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...
Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wund...