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BMCBI
2010
118views more  BMCBI 2010»
15 years 6 months ago
Testing for mean and correlation changes in microarray experiments: an application for pathway analysis
Background: Microarray experiments examine the change in transcript levels of tens of thousands of genes simultaneously. To derive meaningful data, biologists investigate the resp...
Mayer Alvo, Zhongzhu Liu, Andrew Williams, Carole ...
DAC
2007
ACM
16 years 7 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
GLVLSI
2002
IEEE
108views VLSI» more  GLVLSI 2002»
15 years 11 months ago
Protected IP-core test generation
Design simplification is becoming necessary to respect the target time-to-market of SoCs, and this goal can be obtained by using predesigned IP-cores. However, their correct inte...
Alessandro Fin, Franco Fummi
BMCBI
2006
142views more  BMCBI 2006»
15 years 6 months ago
PedGenie: an analysis approach for genetic association testing in extended pedigrees and genealogies of arbitrary size
Background: We present a general approach to perform association analyses in pedigrees of arbitrary size and structure, which also allows for a mixture of pedigree members and ind...
Kristina Allen-Brady, Jathine Wong, Nicola J. Camp
ICCD
2008
IEEE
202views Hardware» more  ICCD 2008»
16 years 3 months ago
CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework
— Extreme scaling practices in silicon technology are quickly leading to integrated circuit components with limited reliability, where phenomena such as early-transistor failures...
Andrea Pellegrini, Kypros Constantinides, Dan Zhan...