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DDECS
2006
IEEE
101views Hardware» more  DDECS 2006»
16 years 15 days ago
Embedded Built-In-Test Detection Circuit for Radio Frequency Systems and Circuits
: An embedded rectifier-based Built-In-Test (BIT) detection circuit for the RF integrated circuits is proposed in this work, and charge pump rectifier is adopted to transform the R...
Guoyan Zhang, Ronan Farrell
IPPS
2006
IEEE
16 years 14 days ago
A portable real-time emulator for testing multi-radio MANETs
In building a real-life mobile ad-hoc network (MANET), network emulation has been appraised as an efficient approach for testing the real implementations of routing algorithms and...
Weirong Jiang, Chao Zhang
ISVLSI
2003
IEEE
157views VLSI» more  ISVLSI 2003»
15 years 11 months ago
Joint Minimization of Power and Area in Scan Testing by Scan Cell Reordering
This paper describes a technique for re-ordering of scan cells to minimize power dissipation that is also capable of reducing the area overhead of the circuit compared to a random...
Shalini Ghosh, Sugato Basu, Nur A. Touba
MTDT
2003
IEEE
124views Hardware» more  MTDT 2003»
15 years 11 months ago
Systematic Memory Test Generation for DRAM Defects Causing Two Floating Nodes
Abstract: The high complexity of the faulty behavior observed in DRAMs is caused primarily by the presence of internal floating nodes in defective DRAMs. This paper describes a ne...
Zaid Al-Ars, A. J. van de Goor
ITC
2002
IEEE
112views Hardware» more  ITC 2002»
15 years 11 months ago
Multiplets, Models, and the Search for Meaning: Improving Per-Test Fault Diagnosis
The advantage to “one test at a time” fault diagnosis is its ability to implicate the components of complicated defect behaviors. The disadvantage is the large size and opacit...
David B. Lavo, Ismed Hartanto, Tracy Larrabee