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FPGA
2003
ACM
154views FPGA» more  FPGA 2003»
15 years 11 months ago
Parallel placement for field-programmable gate arrays
Placement and routing are the most time-consuming processes in automatically synthesizing and configuring circuits for field-programmable gate arrays (FPGAs). In this paper, we ...
Pak K. Chan, Martine D. F. Schlag
FPGA
2003
ACM
161views FPGA» more  FPGA 2003»
15 years 11 months ago
Implementation of BEE: a real-time large-scale hardware emulation engine
This paper describes the hardware implementation of a real-time, large-scale, multi-chip FPGA (Field Programmable Gate Array) based emulation engine with a capacity of 10 million ...
Chen Chang, Kimmo Kuusilinna, Brian C. Richards, R...
FPL
2003
Springer
100views Hardware» more  FPL 2003»
15 years 11 months ago
An Extensible, System-On-Programmable-Chip, Content-Aware Internet Firewall
An extensible firewall has been implemented that performs packet filtering, content scanning, and per-flow queuing of Internet packets at Gigabit/second rates. The firewall use...
John W. Lockwood, Christopher E. Neely, Christophe...
FPL
2003
Springer
164views Hardware» more  FPL 2003»
15 years 11 months ago
Fast, Large-Scale String Match for a 10Gbps FPGA-Based Network Intrusion Detection System
Intrusion Detection Systems such as Snort scan incoming packets for evidence of security threats. The most computation-intensive part of these systems is a text search against hund...
Ioannis Sourdis, Dionisios N. Pnevmatikatos
FSTTCS
2003
Springer
15 years 11 months ago
Reachability Analysis of Process Rewrite Systems
We define a new model called O-PRS that extends the Process Rewrite Systems formalism with a new associative operator, “ ”, that allows to model parallel composition while ke...
Ahmed Bouajjani, Tayssir Touili