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SIGCOMM
2010
ACM
15 years 6 months ago
PacketShader: a GPU-accelerated software router
We present PacketShader, a high-performance software router framework for general packet processing with Graphics Processing Unit (GPU) acceleration. PacketShader exploits the mas...
Sangjin Han, Keon Jang, KyoungSoo Park, Sue B. Moo...
CGF
2010
105views more  CGF 2010»
15 years 6 months ago
Streaming-Enabled Parallel Dataflow Architecture for Multicore Systems
We propose a new framework design for exploiting multi-core architectures in the context of visualization dataflow systems. Recent hardware advancements have greatly increased the...
Huy T. Vo, Daniel K. Osmari, Brian Summa, Jo&atild...
CCE
2008
15 years 6 months ago
Global optimization of multiscenario mixed integer nonlinear programming models arising in the synthesis of integrated water net
The problem of optimal synthesis of an integrated water system is addressed in this work, where water using processes and water treatment operations are combined into a single net...
Ramkumar Karuppiah, Ignacio E. Grossmann
MICRO
2010
IEEE
167views Hardware» more  MICRO 2010»
15 years 4 months ago
Erasing Core Boundaries for Robust and Configurable Performance
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott ...
QEST
2010
IEEE
15 years 4 months ago
Fortuna: Model Checking Priced Probabilistic Timed Automata
We introduce Fortuna, the first tool for model checking priced probabilistic timed automata (PPTAs). Fortuna can handle the combination of real-time, probabilistic and cost feature...
Jasper Berendsen, David N. Jansen, Frits W. Vaandr...