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DATE
2009
IEEE
125views Hardware» more  DATE 2009»
16 years 1 months ago
HLS-l: High-level synthesis of high performance latch-based circuits
An inherent performance gap between custom designs and ASICs is one of the reasons why many designers still start their designs from register transfer level (RTL) description rath...
Seungwhun Paik, Insup Shin, Youngsoo Shin
SIGMETRICS
2010
ACM
162views Hardware» more  SIGMETRICS 2010»
15 years 11 months ago
Coordinated power management of voltage islands in CMPs
Multiple clock domain architectures have recently been proposed to alleviate the power problem in CMPs by having different frequency/voltage values assigned to each domain based o...
Asit K. Mishra, Shekhar Srikantaiah, Mahmut T. Kan...
ATMN
1996
15 years 8 months ago
Dynamic time sharing: a new approach for congestion management
A new approach for bandwidth allocation and congestion control is reported in this paper, which is of the Rate Controlled admission with Priority Scheduling service type. It is ca...
Adrian Popescu, Parag Pruthi
RISE
2005
Springer
16 years 2 days ago
Formal Development of Reactive Fault Tolerant Systems
Usually complex systems are controlled by an operator co-operating with a computer-based controller. The controlling software runs in continuous interaction with the operator and c...
Linas Laibinis, Elena Troubitsyna
EUSFLAT
2007
150views Fuzzy Logic» more  EUSFLAT 2007»
15 years 8 months ago
Competitive Self-adaptation in Evolutionary Algorithms
Heuristic search for the global minimum is studied. This paper is focused on the adaptation of control parameters in differential evolution (DE) and in controlled random search (...
Josef Tvrdík, Ivan Krivý