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SIGDOC
2000
ACM
15 years 11 months ago
Testing documentation with "low-tech" simulation
∗ This paper introduces low-tech simulation as a technique for testing procedures and their documentation. The key idea is to test the interface-procedure-documentation set in th...
David G. Novick
COMPSAC
1999
IEEE
15 years 11 months ago
Optimal Software Release Policy Based on Cost and Reliability with Testing Efficiency
In this paper, we study the optimal software release problem considering cost, reliability and testing eficiency. We first propose a generalized logistic testing-effort function t...
Chin-Yu Huang, Sy-Yen Kuo, Michael R. Lyu
DATE
1999
IEEE
72views Hardware» more  DATE 1999»
15 years 11 months ago
On Programmable Memory Built-In Self Test Architectures
The design and architectures of a microcode-based memory BIST and programmable FSM-based memory BIST unit are presented. The proposed microcode-based memory BIST unit is more e ci...
Kamran Zarrineh, Shambhu J. Upadhyaya
ATS
1998
IEEE
170views Hardware» more  ATS 1998»
15 years 11 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
ICCAD
1998
IEEE
116views Hardware» more  ICCAD 1998»
15 years 11 months ago
On primitive fault test generation in non-scan sequential circuits
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
Ramesh C. Tekumalla, Premachandran R. Menon