21183 search results - page 397 / 4237 » Adaptive Testing by Test |
170
click to vote
ICCAD
2000
IEEE
15 years 11 months ago
2000
IEEE
We present an error catch and analysis (ECA) system for semiconductor memories. The system consists of a test algorithm generator called TAGS, a fault simulator called RAMSES, and...
165
click to vote
VLSID
2000
IEEE
15 years 11 months ago
2000
IEEE
The test signal method can be used to measure and model inductance parameters (self and mutual) of a very small interconnect especially in highdensity IC’s by using a test signa...
158
click to vote
ATS
1998
IEEE
15 years 11 months ago
1998
IEEE
In mixed-mode BIST, deterministic test patterns are generated with on-chip hardware to detect the random-pattern-resistant (r.p.r.) faults that are missed by the pseudo-random pat...
186
click to vote
ASPDAC
1998
ACM
15 years 11 months ago
1998
ACM
— Test Pattern Generation for combinational circuits entails the identification of primary input assignments for detecting each fault in a set of target faults. An extension to ...
209
click to vote
ISSTA
1998
ACM
15 years 11 months ago
1998
ACM
Automatic test data generation leads to identify input values on which a selected point in a procedure is executed. This paper introduces a new method for this problem based on co...