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ITC
2003
IEEE
126views Hardware» more  ITC 2003»
15 years 12 months ago
Impact of Multiple-Detect Test Patterns on Product Quality
This paper presents the impact of multiple-detect test patterns on outgoing product quality. It introduces an ATPG tool that generates multiple-detect test patterns while maximizi...
Brady Benware, Chris Schuermyer, Sreenevasan Ranga...
ITC
2003
IEEE
143views Hardware» more  ITC 2003»
15 years 12 months ago
A Case Study of IR-Drop in Structured At-Speed Testing
At-speed test has become a requirement in IC technologies below 180 nm. Unfortunately, test mode switching activity and IR-drop present special challenges to the successful applic...
Jayashree Saxena, Kenneth M. Butler, Vinay B. Jaya...
LOPSTR
2009
Springer
15 years 11 months ago
Towards a Framework for Constraint-Based Test Case Generation
In this paper, we propose an approach for automated test case generation based on techniques from constraint programming (CP). We advocate the use of standard CP search strategies ...
François Degrave, Tom Schrijvers, Wim Vanho...
ATS
2000
IEEE
116views Hardware» more  ATS 2000»
15 years 11 months ago
An experimental analysis of spot defects in SRAMs: realistic fault models and tests
: In this paper a complete analysis of spot defects in industrial SRAMs will be presented. All possible defects are simulated, and the resulting electrical faults are transformed i...
Said Hamdioui, A. J. van de Goor
DATE
2000
IEEE
110views Hardware» more  DATE 2000»
15 years 11 months ago
A BIST Scheme for On-Chip ADC and DAC Testing
In this paper, we present a BIST scheme for testing onchip AD and DA converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measurin...
Jiun-Lang Huang, Chee-Kian Ong, Kwang-Ting Cheng