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ICSEA
2006
IEEE
16 years 21 days ago
Testing a Network by Inferring Representative State Machines from Network Traces
— This paper describes an innovative approach to network testing based on automatically generating and analyzing state machine models of network behavior. The models are generate...
Nancy D. Griffeth, Yuri Cantor, Constantinos Djouv...
ATS
2005
IEEE
118views Hardware» more  ATS 2005»
16 years 9 days ago
Partial Gating Optimization for Power Reduction During Test Application
Power reduction during test application is important from the viewpoint of chip reliability and for obtaining correct test results. One of the ways to reduce scan test power is to...
Mohammed ElShoukry, Mohammad Tehranipoor, C. P. Ra...
VTS
2005
IEEE
162views Hardware» more  VTS 2005»
16 years 7 days ago
Low-Cost Alternate EVM Test for Wireless Receiver Systems
† In digital radio applications, error-vector-magnitude (EVM) is the primary specification which quantifies the performance of digital modulation implemented in silicon. Producti...
Achintya Halder, Abhijit Chatterjee
FATES
2005
Springer
16 years 6 days ago
Simulated Time for Testing Railway Interlockings with TTCN-3
Abstract. Railway control systems are timed and safety-critical. Testing these systems is a key issue. Prior to system testing, the software of a railway control system is tested s...
Stefan Blom, Natalia Ioustinova, Jaco van de Pol, ...
ISSTA
2004
ACM
16 years 3 days ago
Test input generation with java PathFinder
We show how model checking and symbolic execution can be used to generate test inputs to achieve structural coverage of code that manipulates complex data structures. We focus on ...
Willem Visser, Corina S. Pasareanu, Sarfraz Khursh...