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VTS
2008
IEEE
104views Hardware» more  VTS 2008»
16 years 1 months ago
Signature Rollback - A Technique for Testing Robust Circuits
Dealing with static and dynamic parameter variations has become a major challenge for design and test. To avoid unnecessary yield loss and to ensure reliable system operation a ro...
Uranmandakh Amgalan, Christian Hachmann, Sybille H...
GLVLSI
2007
IEEE
189views VLSI» more  GLVLSI 2007»
16 years 1 months ago
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems
The path-delay fault simulation of functional tests on complex circuits such as current processor-based systems is a daunting task. The amount of computing power and memory needed...
Paolo Bernardi, Michelangelo Grosso, Matteo Sonza ...
KBSE
2007
IEEE
16 years 28 days ago
Synthesis of test purpose directed reactive planning tester for nondeterministic systems
We describe a model-based construction of an online tester for black-box testing of implementation under test (IUT). The external behavior of the IUT is modeled as an output obser...
Jüri Vain, Kullo Raiend, Andres Kull, Juhan P...
AOSE
2007
Springer
16 years 26 days ago
A Goal-Oriented Software Testing Methodology
Abstract. Agent-Oriented Software Engineering (AOSE) methodologies are proposed to develop complex distributed systems based upon the agent paradigm. The natural implementation for...
Duy Cu Nguyen, Anna Perini, Paolo Tonella
DATE
2006
IEEE
111views Hardware» more  DATE 2006»
16 years 22 days ago
Functional test generation using property decompositions for validation of pipelined processors
Functional validation is a major bottleneck in pipelined processor design. Simulation using functional test vectors is the most widely used form of processor validation. While exi...
Heon-Mo Koo, Prabhat Mishra