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ETS
2006
IEEE
119views Hardware» more  ETS 2006»
16 years 21 days ago
On-Chip Test Generation Using Linear Subspaces
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
Ramashis Das, Igor L. Markov, John P. Hayes
ICMCS
2006
IEEE
148views Multimedia» more  ICMCS 2006»
16 years 20 days ago
Hierarchical Load Testing Architecture using Large Scale Virtual Clients
In this work, we develop a hierarchical load testing architecture using large scale virtual clients to reduce the testing time and ensure the stability of the server for distribut...
Bum Lim, Jin Kim, Kwang Shim
ISSRE
2006
IEEE
16 years 20 days ago
A Systematic Approach to Generate Inputs to Test UML Design Models
Practical model validation techniques are needed for model driven development (MDD) techniques to succeed. This paper presents an approach to generating inputs to test UML design ...
Trung T. Dinh-Trong, Sudipto Ghosh, Robert B. Fran...
COMPSAC
2005
IEEE
16 years 8 days ago
Goal-Oriented Test Data Generation for Programs with Pointer Variables
Automatic test data generation leads to the identification of input values on which a selected path or a selected branch is executed within a program (path-oriented vs goalorient...
Arnaud Gotlieb, Tristan Denmat, Bernard Botella
SWSTE
2005
IEEE
16 years 6 days ago
A Process-Complete Automatic Acceptance Testing Framework
We present a new automated software acceptance tests framework. The framework is novel in supporting the entire lifecycle and all QA activities, including test maintenance over mu...
David Talby, Ori Nakar, Noam Shmueli, Eli Margolin...