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DATE
2002
IEEE
136views Hardware» more  DATE 2002»
15 years 11 months ago
Beyond UML to an End-of-Line Functional Test Engine
In this paper, we analyze the use of UML as a starting point to go from design issues to end of production testing of complex embedded systems. The first point is the analysis of ...
Andrea Baldini, Alfredo Benso, Paolo Prinetto, Ser...
DATE
2002
IEEE
117views Hardware» more  DATE 2002»
15 years 11 months ago
Effective Software Self-Test Methodology for Processor Cores
Software self-testing for embedded processor cores based on their instruction set, is a topic of increasing interest since it provides an excellent test resource partitioning tech...
Nektarios Kranitis, Antonis M. Paschalis, Dimitris...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
15 years 11 months ago
FACTOR: A Hierarchical Methodology for Functional Test Generation and Testability Analysis
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
Vivekananda M. Vedula, Jacob A. Abraham
182
Voted
ITC
2002
IEEE
114views Hardware» more  ITC 2002»
15 years 11 months ago
Scan Power Reduction Through Test Data Transition Frequency Analysis
Significant reductions in test application times can be achieved through parallelizing core tests; however, simultaneous test of various cores may result in exceeding power thres...
Ozgur Sinanoglu, Ismet Bayraktaroglu, Alex Orailog...
202
Voted
KBSE
2002
IEEE
15 years 11 months ago
SeDiTeC - Testing Based on Sequence Diagrams
In this paper we present a concept for automated testing of object-oriented applications and a tool called SeDiTeC that implements these concepts for Java applications. SeDiTeC us...
Falk Fraikin, Thomas Leonhardt