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ATS
2004
IEEE
93views Hardware» more  ATS 2004»
15 years 10 months ago
Hybrid BIST Test Scheduling Based on Defect Probabilities
1 This paper describes a heuristic for system-on-chip test scheduling in an abort-on-fail context, where the test is terminated as soon as a defect is detected. We consider an hybr...
Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles
ICSE
2000
IEEE-ACM
15 years 10 months ago
Testing: a roadmap
Testing is an important process that is performed to support quality assurance. Testing activities support quality assurance by gathering information about the nature of the softw...
Mary Jean Harrold
EURODAC
1995
IEEE
164views VHDL» more  EURODAC 1995»
15 years 10 months ago
Bottleneck removal algorithm for dynamic compaction and test cycles reduction
: We present a new, dynamic algorithm for test sequence compaction and test cycle reduction for combinationaland sequential circuits. Several dynamic algorithms for compaction in c...
Srimat T. Chakradhar, Anand Raghunathan
SFP
2003
15 years 7 months ago
Testing reactive systems with GAST
G∀ST is a fully automatic test system. Given a logical property, stated as a function, it is able to generate appropriate test values, to execute tests with these values, and to ...
Pieter W. M. Koopman, Rinus Plasmeijer
ESA
2010
Springer
203views Algorithms» more  ESA 2010»
15 years 7 months ago
Testing Euclidean Spanners
In this paper we develop a property testing algorithm for the problem of testing whether a directed geometric graph with bounded (out)degree is a (1 + )-spanner.
Frank Hellweg, Melanie Schmidt, Christian Sohler