In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
Rodrigo S. de Castro, Alair Pereira do Lago, Dilma...
When a program uses Software Transactional Memory (STM) to synchronize accesses to shared memory, the performance often depends on which STM implementation is used. Implementation...
—A high performance adaptive robust control (ARC) algorithm is developed for a class of nonlinear system with unknown input backlash, parametric uncertainties and uncertain nonli...
We investigate techniques to design 45nm minimum-energy subthreshold CMOS circuits under timing constraints, considering the practical case of an 8-bit multiplier. We first show ...
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...