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ICS
2001
Tsinghua U.
15 years 11 months ago
Slice-processors: an implementation of operation-based prediction
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
Andreas Moshovos, Dionisios N. Pnevmatikatos, Amir...
DATE
2006
IEEE
114views Hardware» more  DATE 2006»
15 years 10 months ago
Compositional, efficient caches for a chip multi-processor
In current multi-media systems major parts of the functionality consist of software tasks executed on a set of concurrently operating processors. Those tasks interfere with each o...
Anca Mariana Molnos, Marc J. M. Heijligers, Sorin ...
ASPLOS
2008
ACM
15 years 8 months ago
Dispersing proprietary applications as benchmarks through code mutation
Industry vendors hesitate to disseminate proprietary applications to academia and third party vendors. By consequence, the benchmarking process is typically driven by standardized...
Luk Van Ertvelde, Lieven Eeckhout
FAST
2011
14 years 10 months ago
Emulating Goliath Storage Systems with David
Benchmarking file and storage systems on large filesystem images is important, but difficult and often infeasible. Typically, running benchmarks on such large disk setups is a ...
Nitin Agrawal, Leo Arulraj, Andrea C. Arpaci-Dusse...
HPCA
2009
IEEE
16 years 7 months ago
PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches
As the last-level on-chip caches in chip-multiprocessors increase in size, the physical locality of on-chip data becomes important for delivering high performance. The non-uniform...
Mainak Chaudhuri