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TCSV
2008
225views more  TCSV 2008»
15 years 6 months ago
Analysis and Efficient Architecture Design for VC-1 Overlap Smoothing and In-Loop Deblocking Filter
Abstract--In contrast to the macroblock-based in-loop deblocking filters, the filters of VC-1 perform all horizontal edges (for in-loop filtering) or vertical edges (for overlap sm...
Yen-Lin Lee, T. Q. Nguyen
SPE
1998
129views more  SPE 1998»
15 years 6 months ago
Timing Trials, or the Trials of Timing: Experiments with Scripting and User-Interface Languages
This paper describes some basic experiments to see how fast various popular scripting and user-interface languages run on a spectrum of representative tasks. We found enormous var...
Brian W. Kernighan, Christopher J. Van Wyk
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
15 years 5 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
SEUS
2010
IEEE
15 years 5 months ago
Crash Recovery in FAST FTL
NAND flash memory is one of the non-volatile memories and has been replacing hard disk in various storage markets from mobile devices, PC/Laptop computers, even to enterprise serv...
Sungup Moon, Sang-Phil Lim, Dong-Joo Park, Sang-Wo...
TIT
2010
111views Education» more  TIT 2010»
15 years 1 months ago
Designing floating codes for expected performance
Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, ...
Flavio Chierichetti, Hilary Finucane, Zhenming Liu...