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ISVLSI
2003
IEEE
118views VLSI» more  ISVLSI 2003»
15 years 12 months ago
Reconfigurable Fast Memory Management System Design for Application Specific Processors
This paper presents the design and implementation of the new Active Memory Manager Unit (AMMU) designed to be embedded into System-on-Chip CPUs. The unit is implemented using VHDL...
S. Kagan Agun, J. Morris Chang
175
Voted
ISWC
2002
IEEE
15 years 11 months ago
Evaluating Contextual Information for Wearable Computing
Does the use of a wearable context-aware computer increase task proficiency? User trials have been carried out in an attempt to answer this question. The study involves WECAPC sof...
Huw W. Bristow, Chris Baber, James Cross, Sandra I...
HPDC
2000
IEEE
15 years 11 months ago
Flexible High-Performance Access to Distributed Storage Resources
We describe a software architecture for storage services in computational grid environments. Based upon a lightweight message-passing paradigm, the architecture enables the provis...
Craig J. Patten, Kenneth A. Hawick
ISLPED
2000
ACM
101views Hardware» more  ISLPED 2000»
15 years 11 months ago
Design issues for dynamic voltage scaling
Processors in portable electronic devices generally have a computational load which has time-varying performance requirements. Dynamic Voltage Scaling is a method to vary the proc...
Thomas D. Burd, Robert W. Brodersen
ISSS
1998
IEEE
103views Hardware» more  ISSS 1998»
15 years 11 months ago
False Path Analysis Based on a Hierarchical Control Representation
False path analysis is an activity with applications in a variety of computer science and engineering domains like for instance high-level synthesis, worst case execution time est...
Apostolos A. Kountouris, Christophe Wolinski