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ASPLOS
2011
ACM
14 years 10 months ago
NV-Heaps: making persistent objects fast and safe with next-generation, non-volatile memories
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...
Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laur...
DAC
2001
ACM
16 years 7 months ago
A True Single-Phase 8-bit Adiabatic Multiplier
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
Suhwan Kim, Conrad H. Ziesler, Marios C. Papaefthy...
HPCA
2009
IEEE
16 years 7 months ago
Dacota: Post-silicon validation of the memory subsystem in multi-core designs
The number of functional errors escaping design verification and being released into final silicon is growing, due to the increasing complexity and shrinking production schedules ...
Andrew DeOrio, Ilya Wagner, Valeria Bertacco
IPCCC
2006
IEEE
16 years 20 days ago
OS-aware tuning: improving instruction cache energy efficiency on system workloads
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...
Tao Li, Lizy K. John
AFRIGRAPH
2006
ACM
16 years 18 days ago
Volumetric high dynamic range windowing for better data representation
Volume data is usually generated by measuring devices (eg. CT scanners, MRI scanners), mathematical functions (eg., Marschner/Lobb function), or by simulations. While all these so...
Dirk Bartz, Benjamin Schnaidt, Jirko Cernik, Ludwi...