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ASPDAC
2005
ACM
193views Hardware» more  ASPDAC 2005»
15 years 12 months ago
VLSI on-chip power/ground network optimization considering decap leakage currents
- In today’s power/ground(P/G) network design, on-chip decoupling capacitors(decaps) are usually made of MOS transistors with source and drain connected together. The gate leak...
Jingjing Fu, Zuying Luo, Xianlong Hong, Yici Cai, ...
CHI
1999
ACM
15 years 10 months ago
An Exploration into Supporting Artwork Orientation in the User Interface
Rotating a piece of paper while drawing is an integral and almost subconscious part of drawing with pencil and paper. In a similar manner, the advent of lightweight pen-based comp...
George W. Fitzmaurice, Ravin Balakrishnan, Gordon ...
ICCAD
1998
IEEE
101views Hardware» more  ICCAD 1998»
15 years 10 months ago
Wireplanning in logic synthesis
In this paper, we propose a new logic synthesis methodology to deal with the increasing importance of the interconnect delay in deepsubmicron technologies. We first show that conv...
Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alb...
ICCD
1997
IEEE
140views Hardware» more  ICCD 1997»
15 years 10 months ago
Parallel-Array Implementations of a Non-Restoring Square Root Algorithm
In this paper, we present a parallel-array implementation of a new non-restoring square root algorithm (PASQRT). The carry-save adder (CSA) is used in the parallel array. The PASQ...
Yamin Li, Wanming Chu
JNW
2006
98views more  JNW 2006»
15 years 6 months ago
Efficient Distributed Algorithm for RWA Using Path Protection
A number of Integer Linear Program (ILP) formulations for both static and dynamic lightpath allocation have been proposed, for the design of survivable WDM networks. However, such ...
Arunita Jaekel, Ying Chen