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ISCA
2006
IEEE
131views Hardware» more  ISCA 2006»
15 years 12 months ago
Reducing Startup Time in Co-Designed Virtual Machines
A Co-Designed Virtual Machine allows designers to implement a processor via a combination of hardware and software. Dynamic binary translation converts code written for a conventi...
Shiliang Hu, James E. Smith
DATE
2002
IEEE
84views Hardware» more  DATE 2002»
15 years 11 months ago
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications
Microprocessors are today getting more and more inefficient for a growing range of applications. Its principles -The Von Neumann paradigm[3]- based on the sequential execution of ...
Gilles Sassatelli, Lionel Torres, Pascal Benoit, T...
SI3D
2010
ACM
16 years 24 days ago
Parallel Banding Algorithm to compute exact distance transform with the GPU
We propose a Parallel Banding Algorithm (PBA) on the GPU to compute the exact Euclidean Distance Transform (EDT) for a binary image in 2D and higher dimensions. Partitioning the i...
Thanh-Tung Cao, Ke Tang, Anis Mohamed, Tiow Seng T...
TCAD
2010
124views more  TCAD 2010»
15 years 20 days ago
A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas
CCGRID
2001
IEEE
15 years 9 months ago
Software Environments For Cluster-Based Display Systems
An inexpensive way to construct a scalable display wall system is to use a cluster of PCs with commodity graphics accelerators to drive an array of projectors. A challenge is to b...
Han Chen, Douglas W. Clark, Zhiyan Liu, Grant Wall...