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ICCD
2005
IEEE
165views Hardware» more  ICCD 2005»
16 years 3 months ago
Applying Resource Sharing Algorithms to ADL-driven Automatic ASIP Implementation
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
Ernst Martin Witte, Anupam Chattopadhyay, Oliver S...
ICCAD
2004
IEEE
100views Hardware» more  ICCAD 2004»
16 years 3 months ago
DynamoSim: a trace-based dynamically compiled instruction set simulator
Instruction set simulators are indispensable tools for the architectural exploration and verification of embedded systems. Different techniques have recently been proposed to spe...
Massimo Poncino, Jianwen Zhu
ICCAD
2003
IEEE
115views Hardware» more  ICCAD 2003»
16 years 3 months ago
Efficient Verification of Hazard-Freedom in Gate-Level Timed Asynchronous Circuits
This paper presents an efficient method for verifying hazard freedom in timed asynchronous circuits. Timed circuits are a class of asynchronous circuits that utilize explicit tim...
Curtis A. Nelson, Chris J. Myers, Tomohiro Yoneda
IUI
2009
ACM
16 years 3 months ago
Have a say over what you see: evaluating interactive compression techniques
We all encounter many documents on a daily basis that we do not have time to process in their entirety. Nevertheless, we lack good tools to rapidly skim and identify key informati...
Simon Tucker, Steve Whittaker
CGO
2010
IEEE
16 years 1 months ago
Large program trace analysis and compression with ZDDs
Prior work has shown that reduced, ordered, binary decision diagrams (BDDs) can be a powerful tool for program trace analysis and visualization. Unfortunately, it can take hours o...
Graham D. Price, Manish Vachharajani