We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
: At Leiden Embedded Research Center (LERC), we are building a tool chain called Compaan/Laura that allows us to map rapidly and efficiently signal processing applications written ...
Steven Derrien, Alexandru Turjan, Claudiu Zissules...
This paper explores various aspects of the image decomposition problem using modern variational techniques. We aim at splitting an original image f into two components u and v, whe...
: Authoring ITS domain models is a difficult task requiring many skills. We explored whether modeling ontology reduces the problem by giving the students of an e-learning summer sc...
This paper presents a new design methodology able to bridge the gap between an abstract specification and a heterogeneous recone architecture. The EPICURE contribution is the resu...
Jean-Philippe Diguet, Guy Gogniat, Jean Luc Philip...