1055 search results - page 125 / 211 » A system level perspective on branch architecture performanc... |
156
click to vote
ACMDIS
2008
ACM
15 years 8 months ago
2008
ACM
This paper provides details of an in-depth investigation into how racing sailors use information displays and devices, and shows that these devices act as communication loci and i...
166
click to vote
BIOINFORMATICS
2006
15 years 6 months ago
2006
Motivation: In the Affymetrix GeneChip system, preprocessing occurs before one obtains expression level measurements. Because the number of competing preprocessing methods was lar...
216
click to vote
ICSOC
2010
Springer
15 years 4 months ago
2010
Springer
In this demo paper we present the prototype of our fault injection testbed generator. Our tool empowers engineers to generate emulated SOA environments and to program fault injecti...
162
click to vote
ASAP
2005
IEEE
16 years 57 min ago
2005
IEEE
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...
209
click to vote
GLVLSI
2007
IEEE
16 years 21 days ago
2007
IEEE
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...