1055 search results - page 123 / 211 » A system level perspective on branch architecture performanc... |
214
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RTAS
1997
IEEE
15 years 10 months ago
1997
IEEE
ÐWith effective packet-scheduling mechanisms, modern integrated networks can support the diverse quality-of-service requirements of emerging applications. However, arbitrating bet...
179
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SIGARCH
2008
15 years 6 months ago
2008
1 This paper presents a simple but effective method to reduce on-chip access latency and improve core isolation in CMP Non-Uniform Cache Architectures (NUCA). The paper introduces ...
193
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FDL
2003
IEEE
15 years 11 months ago
2003
IEEE
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
173
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DAGSTUHL
2004
15 years 7 months ago
2004
A large part of safety-critical embedded systems has to satisfy hard real-time constraints. These need sound methods and tools to derive reliable run-time guarantees. The guarante...
143
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CASES
2007
ACM
15 years 10 months ago
2007
ACM
The development of robust and efficient synthesis tools is important if asynchronous design is to gain more widespread acceptance. Syntax-directed translation is a powerful synthe...