1055 search results - page 118 / 211 » A system level perspective on branch architecture performanc... |
184
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TPDS
2010
15 years 4 months ago
2010
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
203
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VIS
2009
IEEE
16 years 7 months ago
2009
IEEE
This paper describes GL4D, an interactive system for visualizing 2-manifolds and 3-manifolds embedded in four Euclidean dimensions and illuminated by 4D light sources. It is a tetr...
171
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
† Noise performance is a critical analog and RF circuit design constraint, and can impact the selection of the IC system-level architecture. It is therefore imperative that some ...
192
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NOSSDAV
2004
Springer
15 years 11 months ago
2004
Springer
We are developing a distributed architecture for massivelymultiplayer games. In this paper, we focus on designing a low-latency event ordering protocol, called NEO, for this archi...
172
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ACMSE
2009
ACM
16 years 27 days ago
2009
ACM
Most modern microprocessor-based systems provide support for superpages both at the hardware and software level. Judicious use of superpages can significantly cut down the number...