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ISCAS
2003
IEEE
147views Hardware» more  ISCAS 2003»
15 years 11 months ago
Parameterized and low power DSP core for embedded systems
Conventional ASIC designs are hard to be customized. Therefore DSP core-based ASIC design has potentially large payoff. This approach not only supports improved performance but al...
Ya-Lan Tsao, Ming Hsuan Tan, Jun-Xian Teng, Shyh-J...
CLUSTER
2002
IEEE
15 years 11 months ago
Supermon: A High-Speed Cluster Monitoring System
Supermon is a flexible set of tools for high speed, scalable cluster monitoring. Node behavior can be monitored much faster than with other commonly used methods (e.g., rstatd). ...
Matthew J. Sottile, Ronald Minnich
REFLECTION
2001
Springer
15 years 10 months ago
Performance and Integrity in the OpenORB Reflective Middleware
, are to address what we perceive as the most pressing shortcomings of current reflective middleware platforms. First, performance: in the worst case, this needs to be on a par wit...
Gordon S. Blair, Geoff Coulson, Michael Clarke, Ni...
EENERGY
2010
15 years 9 months ago
Energy saving and network performance: a trade-off approach
Power consumption of the Information and Communication Technology sector (ICT) has recently become a key challenge. In particular, actions to improve energy-efficiency of Internet...
Carla Panarello, Alfio Lombardo, Giovanni Schembra...
MICRO
1998
IEEE
89views Hardware» more  MICRO 1998»
15 years 10 months ago
Load Latency Tolerance in Dynamically Scheduled Processors
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
Srikanth T. Srinivasan, Alvin R. Lebeck