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IROS
2007
IEEE
114views Robotics» more  IROS 2007»
16 years 26 days ago
Design and control of a second-generation hyper-redundant mechanism
— We present a refined, second-generation design, construction and integration, of a compact hyper-redundant snakelike robot, called “Woodstock.” This robot has substantial a...
H. Ben Brown, Michael Schwerin, Elie A. Shammas, H...
SBACPAD
2007
IEEE
85views Hardware» more  SBACPAD 2007»
16 years 25 days ago
Exigency-based real-time scheduling policy to provide absolute QoS for web services
— Telemedicine, distance learning and e-commerce applications impose time constraints directly related to the efficacy of their operations. In order to offer reliability levels ...
Lucas S. Casagrande, Rodrigo Fernandes de Mello, R...
SBACPAD
2007
IEEE
143views Hardware» more  SBACPAD 2007»
16 years 25 days ago
A Code Compression Method to Cope with Security Hardware Overheads
Code Compression has been used to alleviate the memory requirements as well as to improve performance and/or minimize energy consumption. On the other hand, implementing security ...
Eduardo Wanderley Netto, Romain Vaslin, Guy Gognia...
EMSOFT
2007
Springer
16 years 22 days ago
Slice-balancing H.264 video encoding for improved scalability of multicore decoding
With multicore architectures being introduced to the market, the research community is revisiting problems to evaluate them under the new preconditions set by those new systems. A...
Michael Roitzsch
FPL
2007
Springer
105views Hardware» more  FPL 2007»
16 years 22 days ago
Time Predictable CPU and DMA Shared Memory Access
In this paper, we propose a first step towards a time predictable computer architecture for single-chip multiprocessing (CMP). CMP is the actual trend in server and desktop syste...
Christof Pitter, Martin Schoeberl
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