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DATE
1999
IEEE
120views Hardware» more  DATE 1999»
15 years 10 months ago
FreezeFrame: Compact Test Generation Using a Frozen Clock Strategy
Test application time is an important factor in the overall cost of VLSI chip testing. We present a new ATPG approach for generating compact test sequences for sequential circuits...
Yanti Santoso, Matthew C. Merten, Elizabeth M. Rud...
ISCAS
1999
IEEE
114views Hardware» more  ISCAS 1999»
15 years 10 months ago
Multicarrier QAM modulator
A multicarrier QAM modulator for the wideband code division multiple access (WCDMA) basestation has been designed. The multicarrier modulator performs pulse shaping filtering for ...
Jouko Vankka, Marko Kosunen, Kari Halonen
FPL
1999
Springer
103views Hardware» more  FPL 1999»
15 years 10 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
HYBRID
1999
Springer
15 years 10 months ago
A New Class of Decidable Hybrid Systems
Abstract. One of the most important analysis problems of hybrid systems is the reachability problem. State of the art computational tools perform reachability computation for timed...
Gerardo Lafferriere, George J. Pappas, Sergio Yovi...
ICCAD
1998
IEEE
116views Hardware» more  ICCAD 1998»
15 years 10 months ago
On primitive fault test generation in non-scan sequential circuits
A method is presented for identifying primitive path-delay faults in non-scan sequential circuits and generating robust tests for all robustly testable primitive faults. It uses t...
Ramesh C. Tekumalla, Premachandran R. Menon