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VTS
1999
IEEE
106views Hardware» more  VTS 1999»
15 years 11 months ago
RT-level TPG Exploiting High-Level Synthesis Information
High-level test pattern generation is today a widely investigated research topic. The present paper proposes a fully automated, simulation-based ATPG system, to address test patte...
Silvia Chiusano, Fulvio Corno, Paolo Prinetto
191
Voted
AIIA
1997
Springer
15 years 11 months ago
Introducing Abduction into (Extensional) Inductive Logic Programming Systems
We propose an approach for the integration of abduction and induction in Logic Programming. In particular, we show how it is possible to learn an abductive logic program starting f...
Evelina Lamma, Paola Mello, Michela Milano, Fabriz...
AIS
2004
Springer
15 years 10 months ago
Timed I/O Test Sequences for Discrete Event Model Verification
Abstract. Model verification examines the correctness of a model implementation with respect to a model specification. While being described from model specification, implementatio...
Ki Jung Hong, Tag Gon Kim
ECCV
2010
Springer
15 years 10 months ago
Discovering Multipart Appearance Models from Captioned Images
Abstract. Even a relatively unstructured captioned image set depicting a variety of objects in cluttered scenes contains strong correlations between caption words and repeated visu...
157
Voted
SIGIR
2010
ACM
15 years 10 months ago
The impact of collection size on relevance and diversity
It has been observed that precision increases with collection size. One explanation could be that the redundancy of information increases, making it easier to find multiple docum...
Marijn Koolen, Jaap Kamps