16404 search results - page 434 / 3281 » A set coverage problem |
187
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ATS
2003
IEEE
16 years 1 days ago
2003
IEEE
We present a framework for high-level design validation using an efficient register-transfer level (RTL) automatic test pattern generator (ATPG). The RTL ATPG generates the test ...
157
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ITC
2003
IEEE
16 years 1 days ago
2003
IEEE
–This paper provides proof of concept for the newly-approved 1149.6 standard by investigating the first silicon implementation of the test receiver. EXTEST and EXTEST_PULSE tests...
200
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SIGSOFT
2003
ACM
16 years 8 hour ago
2003
ACM
This paper presents PLUTO, a simple and intuitive methodology to manage the testing process of product lines, described as Product Lines Use Cases (PLUCs). PLUCs are an extension ...
161
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
We present a new test resource partitioning (TRP) technique for reduced pin-count testing of system-on-a-chip (SOC). The proposed technique is based on test data compression and o...
161
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VTS
2000
IEEE
15 years 11 months ago
2000
IEEE
We propose a novel BIST technique for non-scan sequential circuits which does not modify the circuit under test. It uses a learning algorithm to build a hardware test sequence gen...