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VLSI
2007
Springer
16 years 8 days ago
A low-power deblocking filter architecture for H.264 advanced video coding
Abstract— In this paper, a low-power deblocking filter architecture for H.264/AVC is proposed. A hybrid filtering order has been adopted to boost the speed of the deblocking ...
Jaemoon Kim, Sangkwon Na, Chong-Min Kyung
ISCAS
2006
IEEE
106views Hardware» more  ISCAS 2006»
16 years 6 days ago
A novel approach to L2-sensitivity minimization of digital filters subject to L2-scaling constraints
Abstract— This paper proposes a novel approach to L2sensitivity minimization problem of state-space digital filters subject to L2-scaling constraints. The proposed approach redu...
Shunsuke Yamaki, Masahide Abe, Masayuki Kawamata
ISCAS
2006
IEEE
117views Hardware» more  ISCAS 2006»
16 years 6 days ago
Embedded image coding using quincunx directional filter bank
— An image coding system based on combination of a multiresolution directional decomposition and a morphological dilation algorithm is proposed in this paper. The multiscale fil...
Yilong Liu, Truong T. Nguyen, Soontorn Oraintara
FCCM
2005
IEEE
123views VLSI» more  FCCM 2005»
15 years 11 months ago
A Novel 2D Filter Design Methodology for Heterogeneous Devices
In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve this goal ...
Christos-Savvas Bouganis, George A. Constantinides...
ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
15 years 11 months ago
A novel 2D filter design methodology
Abstract— In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve...
Christos-Savvas Bouganis, George A. Constantinides...