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» A proposal for parallel self-adjusting computation
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DSN
2007
IEEE
16 years 10 days ago
Utilizing Dynamically Coupled Cores to Form a Resilient Chip Multiprocessor
Aggressive CMOS scaling will make future chip multiprocessors (CMPs) increasingly susceptible to transient faults, hard errors, manufacturing defects, and process variations. Exis...
Christopher LaFrieda, Engin Ipek, José F. M...
CLUSTER
2007
IEEE
16 years 8 days ago
Thermal-aware task scheduling for data centers through minimizing heat recirculation
— The thermal environment of data centers plays a significant role in affecting the energy efficiency and the reliability of data center operation. A dominant problem associate...
Qinghui Tang, Sandeep K. S. Gupta, Georgios Varsam...
CASES
2006
ACM
15 years 12 months ago
High-level power analysis for multi-core chips
Technology trends have led to the advent of multi-core chips in the form of both general-purpose chip multiprocessors (CMPs) and embedded multi-processor systems-on-a-chip (MPSoCs...
Noel Eisley, Vassos Soteriou, Li-Shiuan Peh
SAC
2006
ACM
15 years 12 months ago
On the architectural alignment of ATL and QVT
Transforming models is a critical activity in Model Driven Engineering (MDE). With the expected adoption of the OMG QVT standard for model transformation language it is anticipate...
Frédéric Jouault, Ivan Kurtev
EGH
2004
Springer
15 years 11 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo