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» A proposal for parallel self-adjusting computation
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ACSC
2004
IEEE
15 years 10 months ago
Reducing Register Pressure Through LAER Algorithm
When modern processors keep increasing the instruction window size and the issue width to exploit more instruction-level parallelism (ILP), the demand of larger physical register ...
Gao Song
DAC
2004
ACM
15 years 10 months ago
Communication-efficient hardware acceleration for fast functional simulation
This paper presents new technology that accelerates system verification. Traditional methods for verifying functional designs are based on logic simulation, which becomes more tim...
Young-Il Kim, Woo-Seung Yang, Young-Su Kwon, Chong...
APCSAC
2003
IEEE
15 years 10 months ago
On Implementing High Level Concurrency in Java
Abstract. Increasingly threading has become an important architectural component of programming languages to support parallel programming. Previously we have proposed an elegant la...
G. Stewart Von Itzstein, Mark Jasiunas
DAC
2005
ACM
15 years 8 months ago
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips
Microfluidic biochips promise to revolutionize biosensing and clinical diagnostics. As more bioassays are executed concurrently on a biochip, system integration and design complex...
Fei Su, Krishnendu Chakrabarty
DAWAK
2008
Springer
15 years 8 months ago
Efficient Data Distribution for DWS
The DWS (Data Warehouse Striping) technique is a data partitioning approach especially designed for distributed data warehousing environments. In DWS the fact tables are distribute...
Raquel Almeida, Jorge Vieira, Marco Vieira, Henriq...