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» A proposal for parallel self-adjusting computation
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ICPP
2006
IEEE
16 years 25 days ago
Address-Value Decoupling for Early Register Deallocation
We propose a series of aggressive register deallocation mechanisms to reduce the register file pressure and increase the parallelism exploited by superscalar microprocessors. Our ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...
APCSAC
2005
IEEE
16 years 13 days ago
Speculative Issue Logic
In order to enhance the performance of a computer, most modern processors use superscalar architecture and raise the clock frequency. Superscalar architecture can execute more than...
You-Jan Tsai, Jong-Jiann Shieh
SPAA
2003
ACM
16 years 1 days ago
Quantifying instruction criticality for shared memory multiprocessors
Recent research on processor microarchitecture suggests using instruction criticality as a metric to guide hardware control policies. Fields et al. [3, 4] have proposed a directed...
Tong Li, Alvin R. Lebeck, Daniel J. Sorin
IPPS
2000
IEEE
15 years 11 months ago
Reducing Ownership Overhead for Load-Store Sequences in Cache-Coherent Multiprocessors
Parallel programs that modify shared data in a cachecoherent multiprocessor with a write-invalidate coherence protocol create ownership overhead in the form of ownership acquisiti...
Jim Nilsson, Fredrik Dahlgren
HPCA
1998
IEEE
15 years 11 months ago
Speculative Versioning Cache
Dependences among loads and stores whose addresses are unknown hinder the extraction of instruction level parallelism during the execution of a sequential program. Such ambiguous ...
Sridhar Gopal, T. N. Vijaykumar, James E. Smith, G...