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» A proposal for parallel self-adjusting computation
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ICS
2011
Tsinghua U.
14 years 10 months ago
Page placement in hybrid memory systems
Phase-Change Memory (PCM) technology has received substantial attention recently. Because PCM is byte-addressable and exhibits access times in the nanosecond range, it can be used...
Luiz E. Ramos, Eugene Gorbatov, Ricardo Bianchini
HIPC
2009
Springer
15 years 4 months ago
Distance-aware round-robin mapping for large NUCA caches
In many-core architectures, memory blocks are commonly assigned to the banks of a NUCA cache by following a physical mapping. This mapping assigns blocks to cache banks in a round-...
Alberto Ros, Marcelo Cintra, Manuel E. Acacio, Jos...
HPCA
2012
IEEE
14 years 2 months ago
Staged Reads: Mitigating the impact of DRAM writes on DRAM reads
Main memory latencies have always been a concern for system performance. Given that reads are on the critical path for CPU progress, reads must be prioritized over writes. However...
Niladrish Chatterjee, Naveen Muralimanohar, Rajeev...
IPPS
2006
IEEE
16 years 19 days ago
Selecting the tile shape to reduce the total communication volume
In this paper we revisit the tile-shape selection problem, that has been extensively discussed in bibliography. An efficient approach is proposed for the selection of a suitable t...
Nikolaos Drosinos, Georgios I. Goumas, Nectarios K...
PDCAT
2007
Springer
16 years 22 days ago
Realistic Evaluation of Interconnection Network Performance at High Loads
Any simulation-based evaluation of an interconnection network proposal requires a good characterization of the workload. Synthetic traffic patterns based on independent traffic so...
Francisco Javier Ridruejo Perez, Javier Navaridas,...