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171
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ASPDAC
2010
ACM
135views Hardware» more  ASPDAC 2010»
15 years 4 months ago
Statistical timing verification for transparently latched circuits through structural graph traversal
Level-sensitive transparent latches are widely used in high-performance sequential circuit designs. Under process variations, the timing of a transparently latched circuit will ada...
Xingliang Yuan, Jia Wang
228
Voted
ICIP
2010
IEEE
15 years 4 months ago
Human action recognition using the motion of interest points
Even if the problem of human action categorization from videos has received a lot of attention during the past decade, it remains a challenging problem in operative conditions due...
Francesco Monti, Carlo S. Regazzoni
182
Voted
INLG
2010
Springer
15 years 4 months ago
Towards a Programmable Instrumented Generator
In this paper, we propose a general way of constructing an NLG system that permits the systematic exploration of the effects of particular system choices on output quality. We cal...
Chris Mellish
MEMOCODE
2010
IEEE
15 years 4 months ago
Compilation of imperative synchronous programs with refined clocks
To overcome over-synchronization in synchronous programs, we recently introduced clock refinement to our synchronous programming language Quartz. This extension basically allows p...
Mike Gemunde, Jens Brandt, Klaus Schneider
PERCOM
2010
ACM
15 years 4 months ago
Towards automated verification of autonomous networks: A case study in self-configuration
In autonomic networks, the self-configuration of network entities is one of the most desirable properties. In this paper, we show how formal verification techniques can verify the ...
JaeSeung Song, Tiejun Ma, Peter R. Pietzuch