In many designs, the worst-case-delay path may never be exercised or may be exercised infrequently. For those designs, a strategy of optimizing a circuit for the worst-case condit...
Yu-Shih Su, Da-Chung Wang, Shih-Chieh Chang, Malgo...
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...
— In this paper, as a extended structure of the existing relay-destination joint minimum mean square error (MMSE) design, we propose a new source-relay-destination joint MMSE des...
The design of high performance multimedia systems in a short time force us to use IP's blocks in many designs. However, their correct integration in a design implies more com...