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ICCAD
2006
IEEE
141views Hardware» more  ICCAD 2006»
16 years 3 months ago
A code refinement methodology for performance-improved synthesis from C
Although many recent advances have been made in hardware synthesis techniques from software programming languages such as C, the performance of synthesized hardware commonly suffe...
Greg Stitt, Frank Vahid, Walid A. Najjar
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
16 years 1 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
NOCS
2008
IEEE
16 years 29 days ago
Network Simplicity for Latency Insensitive Cores
In this paper we examine a latency insensitive network composed of very fast and simple circuits that connects SoC cores that are also latency insensitive, de-synchronized, or asy...
Daniel Gebhardt, JunBok You, W. Scott Lee, Kenneth...
TRIDENTCOM
2008
IEEE
16 years 28 days ago
Empirical evaluation of VoIP aggregation over a fixed WiMAX testbed
The WiMAX Reference Network Architecture can be used in point-to-point and point-to-multipoint network topologies, and is suitable for providing last-mile, building-to-building, a...
Kostas Pentikousis, Esa Piri, Jarno Pinola, Frerk ...
MOBIQUITOUS
2007
IEEE
16 years 25 days ago
A SpatioTemporal Placement Model for Caching Location Dependent Queries
Client side caching of location dependent queries is an important technique for improving performance of location-based services. Most of the existing research in this area has fo...
Anand Murugappan, Ling Liu