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» A performance evaluation of local descriptors
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CGO
2010
IEEE
16 years 1 months ago
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bi
For memory constrained embedded systems code size is at least as important as performance. One way of increasing code density is to exploit compact instruction formats, e.g. ARM T...
Tobias J. K. Edler von Koch, Igor Böhm, Bj&ou...
HRI
2009
ACM
16 years 1 months ago
How search and its subtasks scale in N robots
The present study investigates the effect of the number of controlled robots on performance of an urban search and rescue (USAR) task using a realistic simulation. Participants co...
Huadong Wang, Michael Lewis, Prasanna Velagapudi, ...
MSWIM
2009
ACM
16 years 1 months ago
An enhanced mechanism for efficient assignment of multiple MBMS sessions towards LTE
The provision of rich multimedia services, such as Mobile TV, is considered of key importance for the Long Term Evolution (LTE) proliferation in mobile market. To this direction, ...
Antonios G. Alexiou, Christos Bouras, Vasileios Ko...
SIGMOD
2009
ACM
172views Database» more  SIGMOD 2009»
16 years 1 months ago
Self-organizing tuple reconstruction in column-stores
Column-stores gained popularity as a promising physical design alternative. Each attribute of a relation is physically stored as a separate column allowing queries to load only th...
Stratos Idreos, Martin L. Kersten, Stefan Manegold
MICRO
2009
IEEE
99views Hardware» more  MICRO 2009»
16 years 1 months ago
Low-cost router microarchitecture for on-chip networks
On-chip networks are critical to the scaling of future multicore processors. The challenge for on-chip network is to reduce the cost including power consumption and area while pro...
John Kim