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» A performance evaluation of local descriptors
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177
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CONEXT
2007
ACM
15 years 10 months ago
On the cost of caching locator/ID mappings
Very recent activities in the IETF and in the Routing Research Group (RRG) of the IRTG focus on defining a new Internet architecture, in order to solve scalability issues related ...
Luigi Iannone, Olivier Bonaventure
183
Voted
EXPCS
2007
15 years 10 months ago
RiceNIC: a reconfigurable network interface for experimental research and education
The evaluation of new network server architectures is usually performed experimentally using either a simulator or a hardware prototype. Accurate simulation of the hardwaresoftwar...
Jeffrey Shafer, Scott Rixner
FPGA
2006
ACM
139views FPGA» more  FPGA 2006»
15 years 10 months ago
Fast and accurate resource estimation of automatically generated custom DFT IP cores
This paper presents an equation-based resource utilization model for automatically generated discrete Fourier transform (DFT) soft core IPs. The parameterized DFT IP generator all...
Peter A. Milder, Mohammad Ahmad, James C. Hoe, Mar...
196
Voted
FPGA
2006
ACM
141views FPGA» more  FPGA 2006»
15 years 10 months ago
A reconfigurable architecture for hybrid CMOS/Nanodevice circuits
This report describes a preliminary evaluation of possible performance of an FPGA-like architecture for future hybrid "CMOL" circuits which combine a semiconductor-trans...
Dmitri B. Strukov, Konstantin Likharev
GECCO
2006
Springer
173views Optimization» more  GECCO 2006»
15 years 10 months ago
Pareto-coevolutionary genetic programming classifier
The conversion and extension of the Incremental ParetoCoevolution Archive algorithm (IPCA) into the domain of Genetic Programming classifier evolution is presented. In order to ac...
Michal Lemczyk, Malcolm I. Heywood