6129 search results - page 860 / 1226 » A parallel LLL algorithm |
196
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LATINCRYPT
2010
15 years 5 months ago
2010
We describe an FPGA accelerator for the Kannan–Fincke– Pohst enumeration algorithm (KFP) solving the Shortest Lattice Vector Problem (SVP). This is the first FPGA implementati...
196
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ACL
2010
2010
Bayesian Synchronous Tree-Substitution Grammar Induction and Its Application to Sentence Compression
15 years 4 months ago
We describe our experiments with training algorithms for tree-to-tree synchronous tree-substitution grammar (STSG) for monolingual translation tasks such as sentence compression a...
228
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LCTRTS
2010
Springer
15 years 4 months ago
2010
Springer
Concurrent Action-Oriented Specifications (CAOS) model the behavior of a synchronous hardware circuit as asynchronous guarded at an abstraction level higher than the Register Tran...
154
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TCBB
2011
15 years 1 months ago
2011
A TOPS diagram is a simplified description of the topology of a protein using a graph where nodes are α-helices and β-strands, and edges correspond to chirality relations and p...
170
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IJPP
2011
15 years 1 months ago
2011
Data-parallel accelerator devices such as Graphical Processing Units (GPUs) are providing dramatic performance improvements over even multicore CPUs for lattice-oriented applicatio...