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IEEEPACT
2006
IEEE
16 years 22 days ago
A low-cost memory remapping scheme for address bus protection
The address sequence on the processor-memory bus can reveal abundant information about the control flow of a program. This can lead to critical information leakage such as encryp...
Lan Gao, Jun Yang 0002, Marek Chrobak, Youtao Zhan...
ICS
2010
Tsinghua U.
15 years 9 months ago
The auction: optimizing banks usage in Non-Uniform Cache Architectures
The growing influence of wire delay in cache design has meant that access latencies to last-level cache banks are no longer constant. Non-Uniform Cache Architectures (NUCAs) have ...
Javier Lira, Carlos Molina, Antonio Gonzále...
GIS
2010
ACM
15 years 5 months ago
Decentralized querying of topological relations between regions without using localization
This paper proposes an efficient, decentralized algorithm for determining the topological relationship between two regions monitored by a geosensor network. Many centralized algo...
Matt Duckham, Myeong Hun Jeong, Sanjiang Li, Joche...
IPPS
2000
IEEE
15 years 11 months ago
Three Dimensional VLSI-Scale Interconnects
As processor speeds rapidly approach the Giga-Hertz regime, the disparity between process time and memory access time plays an increasing role in the overall limitation of processo...
Dennis W. Prather
SOSP
2007
ACM
16 years 3 months ago
Information flow control for standard OS abstractions
ion Flow Control for Standard OS Abstractions Maxwell Krohn Alexander Yip Micah Brodsky Natan Cliffer M. Frans Kaashoek Eddie Kohler† Robert Morris MIT CSAIL †UCLA http://flum...
Maxwell N. Krohn, Alexander Yip, Micah Z. Brodsky,...
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