577 search results - page 29 / 116 » A neurodynamical model for working memory |
174
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ARCS
2009
Springer
16 years 22 days ago
2009
Springer
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
142
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ISCA
1997
IEEE
15 years 10 months ago
1997
IEEE
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
194
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NOCS
2008
IEEE
16 years 16 days ago
2008
IEEE
We present a methodology to debug a SOC by concentrating on its communication. Our extended communication model includes a) multiple signal groups per interface protocol at each I...
160
Voted
ISCA
1993
IEEE
15 years 10 months ago
1993
IEEE
We evaluate the e ect of processor speed, network bandwidth, and software overhead on the performance of release-consistent software distributed shared memory. We examine ve di er...
277
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ASPLOS
2011
ACM
14 years 9 months ago
2011
ACM
nt, user-defined objects present an attractive abstraction for working with non-volatile program state. However, the slow speed of persistent storage (i.e., disk) has restricted ...