Sciweavers

5215 search results - page 687 / 1043
» A model of normative power
Sort
View
IPPS
2008
IEEE
16 years 1 months ago
Parallel option pricing with Fourier Space Time-stepping method on Graphics Processing Units
With the evolution of Graphics Processing Units (GPUs) into powerful and cost-efficient computing architectures, their range of application has expanded tremendously, especially i...
Vladimir Surkov
ISCA
2008
IEEE
107views Hardware» more  ISCA 2008»
16 years 1 months ago
Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments
This paper seeks to understand and design nextgeneration servers for emerging “warehousecomputing” environments. We make two key contributions. First, we put together a detail...
Kevin T. Lim, Parthasarathy Ranganathan, Jichuan C...
LICS
2008
IEEE
16 years 1 months ago
Typed Normal Form Bisimulation for Parametric Polymorphism
This paper presents a new bisimulation theory for parametric polymorphism which enables straightforward coinductive proofs of program equivalences involving existential types. The...
Søren B. Lassen, Paul Blain Levy
VTC
2008
IEEE
16 years 1 months ago
On the Capacity of Generalized Fading/Shadowing Channels
Abstract—In this paper the Shannon capacity of generalizedgamma (GG) fading channels is studied, under different adaptive transmission techniques. The GG is a generic distributio...
Petros S. Bithas, P. Takis Mathiopoulos, Stavros A...
DATE
2007
IEEE
74views Hardware» more  DATE 2007»
16 years 1 months ago
Joint consideration of fault-tolerance, energy-efficiency and performance in on-chip networks
High reliability against noise, low energy consumption and high performance are key objectives in the design of on-chip networks. Recently some researchers have considered the var...
Alireza Ejlali, Bashir M. Al-Hashimi, Paul M. Rosi...