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» A model of normative power
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ISQED
2010
IEEE
137views Hardware» more  ISQED 2010»
15 years 4 months ago
Analysis of power supply induced jitter in actively de-skewed multi-core systems
This paper studies multi-core clock distribution using active deskewing methods. We propose an efficient methodology that uses Verilog-A to model PLLs, clock trees and power suppl...
Derek Chan, Matthew R. Guthaus
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
16 years 13 days ago
Mixed-signal design of a digital input power amplifier for automotive audio applications
With reference to digital input power amplifier for automotive audio applications, the paper presents an exhaustive exploration of the huge mixed-signal space to find optimal trad...
Sergio Saponara, Pierangelo Terreni
ISCAS
2006
IEEE
100views Hardware» more  ISCAS 2006»
16 years 12 days ago
Power system on a chip (PSoC)
— This paper addresses modeling issues behind the development of a hardware analog emulator of power system behavior referred to as a Power System on a Chip (PSoC). The paper wil...
Chika O. Nwankpa, A. S. Deese, Qingyan Liu, Aaron ...
INFOCOM
2005
IEEE
15 years 12 months ago
Power controlled minimum frame length scheduling in TDMA wireless networks with sectored antennas
Abstract— We consider the problem of power controlled minimum frame length scheduling for TDMA wireless networks. Given a set of one-hop transmission requests, our objective is t...
Arindam Kumar Das, Robert J. Marks II, Payman Arab...
FPL
2005
Springer
100views Hardware» more  FPL 2005»
15 years 12 months ago
Power and Area Optimization for Multiple Restricted Multiplication
This paper presents a design and optimization technique for the Multiple Restricted Multiplication problem [1]. This refers to a situation where a single variable is multiplied by...
Nalin Sidahao, George A. Constantinides, Peter Y. ...