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GLVLSI
2007
IEEE
111views VLSI» more  GLVLSI 2007»
16 years 20 days ago
Probabilistic gate-level power estimation using a novel waveform set method
A probabilistic power estimation technique for combinational circuits is presented. A novel set of simple waveforms is the kernel of this technique. The transition density of each...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Ein...
DAC
1999
ACM
15 years 10 months ago
Synthesis of Low Power CMOS VLSI Circuits Using Dual Supply Voltages
Dynamic power consumed in CMOS gates goes down quadratically with the supply voltage. By maintaining a high supply voltage for gates on the critical path and by using a low supply...
Vijay Sundararajan, Keshab K. Parhi
ASPDAC
2007
ACM
93views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Flow-Through-Queue based Power Management for Gigabit Ethernet Controller
- This paper presents a novel architectural mechanism and a power management structure for the design of an energy-efficient Gigabit Ethernet controller. Key characteristics of suc...
Hwisung Jung, Andy Hwang, Massoud Pedram
WSC
2001
15 years 7 months ago
Ford's power train operations: changing the simulation environment
This paper discusses the changes that were required to Ford's Power Train Operations (PTO) simulation environment to ensure the maximum benefit was gained from the investment...
John Ladbrook, Annette Januszczak
ECCC
2000
158views more  ECCC 2000»
15 years 6 months ago
On the Computational Power of Winner-Take-All
This article initiates a rigorous theoretical analysis of the computational power of circuits that employ modules for computing winner-take-all. Computational models that involve ...
Wolfgang Maass