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ISCA
1998
IEEE
114views Hardware» more  ISCA 1998»
15 years 10 months ago
The MIT Alewife Machine: Architecture and Performance
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
Anant Agarwal, Ricardo Bianchini, David Chaiken, K...
ICCAD
1997
IEEE
94views Hardware» more  ICCAD 1997»
15 years 10 months ago
PRIMA: passive reduced-order interconnect macromodeling algorithm
— This paper describes an algorithm for generating provably passive reduced-order N-port models for RLC interconnect circuits. It is demonstrated that, in addition to macromodel ...
Altan Odabasioglu, Mustafa Celik, Lawrence T. Pile...
RTSS
1997
IEEE
15 years 10 months ago
On-the-fly symbolic model checking for real-time systems
This paper presents an on-the-fly and symbolic algorithm for checking whether a timed automaton satisfies a formula of a timed temporal logic which is more expressive than TCTL....
Ahmed Bouajjani, Stavros Tripakis, Sergio Yovine
ICCAD
1996
IEEE
80views Hardware» more  ICCAD 1996»
15 years 10 months ago
Generalized constraint generation in the presence of non-deterministic parasitics
In a constraint-drivenlayout synthesisenvironment,parasitic constraints are generated and implemented in each phase of the design process to meet a given set of performance specif...
Edoardo Charbon, Paolo Miliozzi, Enrico Malavasi, ...
FPL
1997
Springer
68views Hardware» more  FPL 1997»
15 years 10 months ago
Pipeline morphing and virtual pipelines
Abstract. Pipeline morphing is a simple but e ective technique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency assoc...
Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K....