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ISCA
2000
IEEE
107views Hardware» more  ISCA 2000»
15 years 11 months ago
A fully associative software-managed cache design
As DRAM access latencies approach a thousand instructionexecution times and on-chip caches grow to multiple megabytes, it is not clear that conventional cache structures continue ...
Erik G. Hallnor, Steven K. Reinhardt
ISCA
2000
IEEE
99views Hardware» more  ISCA 2000»
15 years 11 months ago
Transient fault detection via simultaneous multithreading
Smaller feature sizes, reduced voltage levels, higher transistor counts, and reduced noise margins make future generations of microprocessors increasingly prone to transient hardw...
Steven K. Reinhardt, Shubhendu S. Mukherjee
185
Voted
MSS
2000
IEEE
113views Hardware» more  MSS 2000»
15 years 11 months ago
Jiro Storage Management
The Jiro™ technology provides an environment intended for the implementation of storage management solutions. A product based on Jiro technology is an implementation based on th...
Bruce K. Haddon, William H. Connor
SSIAI
2000
IEEE
15 years 11 months ago
A New Bayesian Relaxation Framework for the Estimation and Segmentation of Multiple Motions
In this paper we propose a new probabilistic relaxation framework to perform robust multiple motion estimation and segmentation from a sequence of images. Our approach uses displa...
Alexander Strehl, Jake K. Aggarwal
170
Voted
ASPLOS
2000
ACM
15 years 11 months ago
Thread Level Parallelism and Interactive Performance of Desktop Applications
Multiprocessing is already prevalent in servers where multiple clients present an obvious source of thread-level parallelism. However, the case for multiprocessing is less clear f...
Krisztián Flautner, Richard Uhlig, Steven K...
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